Transaction-Level Modeling with SystemC

Transaction-Level Modeling with SystemC

English | 28 Nov. 2005 | ISBN: 0387262326 | 288 Pages | PDF | 11 MB

Currently employed at STMicroelectronics, Transactional-Level Modeling (TLM) puts forward a novel SoC design methodology beyond RTL with measured improvements of productivity and first time silicon success. The SystemC consortium has published the official TLM development kit in May 2005 to standardize this modeling technique.


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